PCB Design/Layout/Placement
As use of artificial intelligence in electronics design and manufacturing becomes a discussion point, it recalls a similar debate from 40 years ago on the impact of a new technology -- SMT -- that promised to disrupt the industry norms of that era. In this webinar, special panel considers the actual intelligence in these tools, and the ways – and how soon – they might impact the industry.
Panelists:
• Tomide Adesanmi, Circuit Mind
• Taylor Hogan, Cadence Design Systems
• Kyle Miller, Ph.D., Zuken
• Sebastian Schaal, Luminovo
• David Wiens, Siemens Digital Industries
Phil Marcoux, who is credited with installing the surface mount line in the US and has consulted to AI companies, moderates the panel.
Maintaining a product is very difficult when:
- The source files aren’t available
- Only Gerber files and maintenance documents are available
- Making a revision to a company-owned product with no source files.
This webinar presents a skillset to technicians, designers and engineers that leverages assembled PCBs without design data to be recovered and recreated. Often, end-of-life or existing systems have design data that are lost, abandoned or of unknown origin, a rising concern among teams building or maintaining these systems. Using a set of software- and hardware-agnostic processes, this course analyzes a design of unknown origin and recreates that design with a set of commonly available tools. Once equipped with this skillset, attendees will have the knowledge to recreate and recover lost or unavailable design data on current and future projects.
The course will introduce:
- Basic reverse-engineering techniques with benchtop test equipment
- Reworking and testing techniques
- Identifying PCB structures
- Identifying components
- Using photography and image manipulation tools
- Migrating the design into a generic ECAD tool.
Who should attend: PCB Designer/Design Engineer, System Designer, Hardware Engineer
Target audience: Beginner, Intermediate
There is more to board design than placing parts and connecting the signals electrically. Those who design the board can make a huge impact on the ease of fabrication and assembly just by adhering to standard (best) practices as they work. Knowledge and use of these practices, whether IPC or company standards, enables you to balance the needs of each stakeholder with pricing while also increasing manufacturability and reducing problems that may be created during the manufacturing process.
This presentation is not about how to build a board, but rather about the practical things the board engineer can do to help make fabrication and assembly easier and therefore increase yields and lower the cost for all.
About the Speaker
Susy Webb, CID, is a senior PCB designer with 40 years of experience. Her career includes experience in coastal and oceanographic oil exploration and monitoring equipment, point-to-point microwave network systems, and CPCI and ATX computer motherboards. Webb is a regular speaker at the PCB, IPC and international design conferences and consults for individual companies and PCEA chapters as well. Her presentations discuss practical implementation of complex engineering concepts into board layout and methods to improve the overall design and flow of printed circuit boards. She is CID certified, a former writer/columnist for PCD&F, a chapter writer for Clyde Coombs’ Printed Circuits Handbook, and one of the judges for the annual TLA competition. Webb is also an active member of the PCEA executive board and education committee and is a member and past president of the Houston chapter of the Designers Council.
Topics covered: 1. BGA/CSP process technologies and standards; single die BGA and FBGA packaging, flip-chip and die-size package technologies, wafer level packaging (WLP), fan-out wafer-level packaging (FOWLP), JEDEC package outline standards. 2. Innovative solutions for 2D, 2.5D and 3D packaging, 2D BGA package technology, 3D multiple die and stacked package methodologies, implementing 2.5D for high-density BGA applications, silicon-based interposer structure, glass-based interposer structures, organic (laminate) based interposer structures. 3. Printed circuit board design guidelines for HDI, ball grid array (BGA), fine-pitch ball grid array (FBGA and DSBGA), flip-chip (WLP/FOWLP), 2.5D interposer structures; 4. HDI circuit and microvia design implementation, HDI circuit fabrication variations, microvia process methodology, design guidelines for HDI circuits, HDI sources and economic issues. 5. Specifying PCB base material, surface finish and coatings, organic-based material selection criteria, specifying thickness of copper foils, surface plating and coating variations, solder mask process considerations; 6. Preparation for high-volume assembly processing, surface mount assembly process overview, basic features needed for SMT assembly processing, system requirements for BGA and CSP device placement, palletizing to maximize assembly process efficiency, assembly process implementation.
When designing a PCB, the signal routing and its return are critical to the circuit working properly. Great care is usually given to routing the signals, but often the return portion is the last thing considered, or sometimes it is forgotten altogether. This presentation will talk about the importance of designing that return path, with a discussion of the physics involved, where the energy flows, the interference caused when it is not controlled, and the planes and stackup needed. Additionally, we will discuss the best ways to contain energy fields, the spacing that helps prevent problems, and the routing and return movement from layer to layer. Throughout, we will discuss some signal routes and look at the paths that might set up the best possibility for a clean return.
A differential pair is any two transmission lines. When each transmission line has a return plane, its pretty clear how the differential impedance is related to the geometry. But what if there is no return plane? How do we think about the differential impedance of a differential pair when we remove the return plane, like in a twisted pair? What quality influences the differential impedance and how do we go about measuring the differential impedance? What is really different between two transmission lines with a return plane and a twisted pair with no return plane? We will explore these questions using essential principles, 2D field solvers and TDR measurements.
When creating libraries, standards are crucial for maintaining consistency, accuracy, and reliability. Yet, even with rigid standards in place, mistakes inevitably creep into such a detail-oriented process. In this talk, we’ll explore some hair-raising footprint horror stories and how to avoid fatal footprint mistakes on your next PCB design. Delving far beyond the basics, we’ll look at the more gnarly errors that trip up engineers. For example, we all know to double-check our pin mappings, but what about how you have interpreted the component’s orientation in the datasheet? Misinterpreting a component’s top view for its bottom view is one of the top causes of bad boards that we see. Drawn from our community of 200,000 engineers, our hope is these lessons will prevent costly prototype iterations and delays on your next project. Finally, we’ll explore how to prevent these errors on your next designs. For example, by bringing in more verification into your processes through checklists or by creating an automated system for assessing the quality of your PCB footprints.
There are many ways to route a PCB, some much more effective for signals than others. The first design rule is that the board must work properly, so it is important to have a plan that addresses good signal quality and crosstalk control, no matter what the frequency. In this presentation, we will start with a bit of the science to set up the reasoning for routing a certain way, then move into return current and impedance control, with a discussion of what affects those things. Starting route with an effective fanout plan sets up what is to come, and we will also explore general routing priorities and concerns. To avoid problems, routing schemes will be addressed, along with spacing, differential pair and length matched routing. Last, pros and cons of hand routing, semiautomation, and autorouting will be examined.
Some experts say you should never use a split ground plane. Others say you should use a split ground plane to control noise. When is the right time to split a ground plane? We will explore the impact of a split plane on reducing cross talk and demonstrate with a simple measurement the problem a split ground plane solves really well. Then we’ll look at why, if your design needs to take advantage of the reduced cross talk with a split plane, you are designing your product wrong.
This is a session for embedded engineers and PCB designers who have never done RF board layout but are curious and want to have a go at it. It is not for experienced microwave engineers. This practical workshop will introduce (or reintroduce) basic math associated with the topic, but the goal is to be practical and intuitive, not theoretical and esoteric. We will visualize the elements available and build and test using desktop prototyping gear.
The class is broken into two sessions (morning and afternoon). Session 1: Back to basics electromagnetic recap; transmission lines – what you need to know; EM and T-line visualizations; PCB materials and conductors for RF and microwave. Session 2: Essential transmission line evaluation skills (VSWR, S-parameters, basic simulation and visualization); introduction to the Smith chart, and how to match impedance; practical design exercise with introduction to the VNA; using the desktop CNC to mill practical prototypes (and tips to mill with accuracy); introduction to PCB antenna types.
